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BOOK
Author Buchanan, B.
Title Analysis and design of maximum-gain, low-current junction field effect transistor configurations / B. Buchanan, S. Roosild, R. Dolan.
Imprint L. G. Hanscom Field, Mass. : Air Force Cambridge Research Laboratories, Office of Aerospace Research, United States Air Force, 1967.

Copies/Volumes

LOCATION CALL # STATUS
 GovDocs Federal  D 301.45/40:318    AVAILABLE
Description vi, 40 p. : ill. ; 28 cm.
Series Physical Sciences Research Papers ; No. 318.
AFCRL ; 67-0184.
Air Force Cambridge Research Laboratories ; AFCRL 67-0184.
Note "March 1967."
AD0654308 (from http://www.dtic.mil).
Solid State Sciences Laboratory Project 4608.
Research supported by the Solid State Sciences Laboratory, Air Force Cambridge Research Laboratories, Office of Aerospace Research, United States Air Force, L. G. Hanscom Field, Bedford, Massachusetts.
Bibliog. Includes bibliographical references (p. 40).
Subject Field-effect transistors.
Transistors -- Amplifiers (Electronics)
Summary Representative types of junction field effect transistor (JFET) configurations are analyzed on a qualitative comparative basis to determine the JFET configuration with the largest gain. Experimental results are presented on a small current amplifying device (SCAD) whose design is based on this determination. (Author).
Other Author Air Force Cambridge Research Laboratories (U.S.)